A Formal Verification Approach for Detecting Opcode Trojans

被引:0
作者
Mathure, Nimish [1 ]
Srinivasan, Sudarshan K. [1 ]
Ponugoti, Kushal K. [1 ]
Malik, Akansha [1 ]
Quanbeck, Samuel [1 ]
机构
[1] North Dakota State Univ, Dept Elect & Comp Engn, Fargo, ND 58105 USA
来源
2020 27TH IEEE INTERNATIONAL CONFERENCE ON ELECTRONICS, CIRCUITS AND SYSTEMS (ICECS) | 2020年
关键词
Hardware Trojans; Opcode Trojans; Formal Verification;
D O I
10.1109/icecs49266.2020.9294803
中图分类号
TM [电工技术]; TN [电子技术、通信技术];
学科分类号
0808 ; 0809 ;
摘要
Hardware Trojans are malicious circuit modifications and are a rising threat to the integrated circuit supply chain. There are a number of trojans directed specifically at microprocessor designs. This paper examines the threat of invalid opcodes being used as trigger mechanism for trojans in microprocessors. We demonstrate the effect of such trojans and propose an automated formal verification methodology to detect such trojans. The methodology was tested on processor models based on MIPS and RISC-V architecture. Processor benchmark circuits with as many as 400,000 gates were verified using our approach.
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页数:4
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