Design and Implementation of 31-Level Asymmetrical Inverter With Reduced Components

被引:34
作者
Prasad, Devalraju [1 ]
Dhanamjayulu, C. [1 ,2 ]
Padmanaban, Sanjeevikumar [2 ]
Holm-Nielsen, Jens Bo [2 ]
Blaabjerg, Frede [3 ]
Khasim, Shaik Reddi [1 ]
机构
[1] Vellore Inst Technol VIT Univ, Sch Elect Engn, Vellore 632014, Tamil Nadu, India
[2] Aalborg Univ, Ctr Bioenergy & Green Engn, Dept Energy Technol, DK-6700 Esbjerg, Denmark
[3] Aalborg Univ, Ctr Reliable Power Elect CORPE, Dept Energy Technol, DK-6700 Aalborg, Denmark
关键词
Topology; Switches; Through-silicon vias; Multilevel inverters; Cost function; Control systems; Power system reliability; Multilevel inverter; TSV calculation; cost function (CF); total harmonic distortion (THD); CASCADED MULTILEVEL INVERTER; HYBRID; SINGLE; TOPOLOGY; CONVERTERS; NUMBER; CELLS;
D O I
10.1109/ACCESS.2021.3055368
中图分类号
TP [自动化技术、计算机技术];
学科分类号
0812 ;
摘要
This paper presents a novel topology for the single-phase 31-level asymmetrical multilevel inverter accomplished with reduced components count. The proposed topology generates maximum 31-level output voltage with asymmetric DC sources with an H-bridge. The fundamental 13-level multilevel inverter (MLI) topology is realized, and further, the topology is developed for 31-level can be used for renewable energy applications. This reduces the overall components count, cost and size of the system. Rather than the many advantages of MLIs, reliability issues play a significant role due to higher components count to reduce THD. This is a vital challenge for the researchers to increase the reliability with less THD. Several parameters are analyzed for both fundamental 13-level and developed 31-level MLIs such as total standing voltage (TSV), cost function (CF) and power loss. The inverter is tested experimentally with various combinational loads and under dynamic load variations with sudden load disturbances. Total standing voltage with the cost function for the proposed MLI is compared with various topologies published recently and is cost-effective. A detailed comparison of several parameters with graphical representation is made. Less TSV and components requirement is observed for the proposed MLI. The obtained total harmonic distortion (THD) is under IEEE standards. The topology is simulated in MATLAB/Simulink and verified experimentally with a hardware prototype under various conditions.
引用
收藏
页码:22788 / 22803
页数:16
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