A low power ASK clock and data recovery circuit for wireless implantable electronics

被引：23
|
作者：
Yu, Hong [1 ]
Bashirullah, Rizwan [1 ]
机构：
[1] Univ Florida, Dept Elect & Comp Engn, Gainesville, FL 32611 USA
来源：
PROCEEDINGS OF THE IEEE 2006 CUSTOM INTEGRATED CIRCUITS CONFERENCE | 2006年
关键词：
D O I：
10.1109/CICC.2006.321005
中图分类号：
TM [电工技术]; TN [电子技术、通信技术];
学科分类号：
0808 ; 0809 ;
摘要：
This paper describes a low power clock and data recovery (CDR) circuit with integrated ASK demodulator for wireless implantable neural recording microsystems. A modulation scheme based on amplitude shift-keying (ASK) and pulse position modulation (PPM) is employed to simplify the complexity of implant circuits and reduce power transmission requirements. A charge-pump based CDR circuit is used to extract non-return to zero data from the demodulated waveforms. A prototype has been fabricated in 2-poly 3-Metal 0.6 mu m bulk CMOS technology in order to validate circuit functionality. The receiver front-end exhibits a sensitivity of 3.2mV p-p at 1MHz. The ASK demodulator and CDR operates over an input data range of 4kbs to 18kbs, measures 300 mu m by 600 mu m and dissipates 70 mu W from a 2.7V supply.
引用
收藏
页码：249 / 252
页数：4
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