Increasing energy efficiency of embedded systems by application-specific memory hierarchy generation

被引:41
作者
Benini, L
Macii, A [2 ]
Macii, E
Poncino, M
机构
[1] Univ Bologna, I-40126 Bologna, Italy
[2] Politecn Torino, I-10129 Turin, Italy
来源
IEEE DESIGN & TEST OF COMPUTERS | 2000年 / 17卷 / 02期
关键词
D O I
10.1109/54.844336
中图分类号
TP3 [计算技术、计算机技术];
学科分类号
0812 ;
摘要
This article presents a methodology for automatic memory hierarchy generation that exploits memory access locality of embedded software. The methodology is successfully applied to the design of an MP3 decoder.
引用
收藏
页码:74 / 85
页数:12
相关论文
共 10 条
[1]  
Benini L., 1999, Proceedings. 1999 International Symposium on Low Power Electronics and Design (Cat. No.99TH8477), P288, DOI 10.1109/LPE.1999.799460
[2]  
Catthoor Francky, 1998, CUSTOM MEMORY MANAGE
[3]  
DAVIS J, 1999, M9937 ERL UCB DEP EE
[4]  
FARRAHI AH, 1995, DES AUT CON, P36
[5]   CACHE PERFORMANCE OF THE SPEC92 BENCHMARK SUITE [J].
GEE, JD ;
HILL, MD ;
PNEVMATIKATOS, DN ;
SMITH, AJ .
IEEE MICRO, 1993, 13 (04) :17-27
[6]  
Hennessy J. L, 2012, COMPUTER ARCHITECTUR
[7]  
Kamble MB, 1997, 1997 INTERNATIONAL SYMPOSIUM ON LOW POWER ELECTRONICS AND DESIGN, PROCEEDINGS, P143, DOI 10.1109/LPE.1997.621264
[8]   Energy optimization of multilevel cache architectures for RISC and CISC processors [J].
Ko, U ;
Balsara, T ;
Nanda, AK .
IEEE TRANSACTIONS ON VERY LARGE SCALE INTEGRATION (VLSI) SYSTEMS, 1998, 6 (02) :299-308
[9]   A TUTORIAL ON MPEG AUDIO COMPRESSION [J].
PAN, D .
IEEE MULTIMEDIA, 1995, 2 (02) :60-74
[10]   CACTI: An enhanced cache access and cycle time model [J].
Wilton, SJE ;
Jouppi, NP .
IEEE JOURNAL OF SOLID-STATE CIRCUITS, 1996, 31 (05) :677-688