Modelling interconnects with surface roughness

Interconnect modelling is playing crucial role in the integrated circuit design verification since the performance success of design depends on interconnects for today's ICs. For accurate modelling it is more important to take into account all the physical effects with the progresses in technology. One such aspect is roughness on the interconnect surfaces which is arising due to various processes used for fabricating them. In this paper we present model and simulation results for interconnect capacitance, resistance and maximum electric field for interconnects with rough surface. (C) 2002 Elsevier Science Ltd. All rights reserved.