Improving Scalability of Exact Modulo Scheduling with Specialized Conflict-Driven Learning

被引:5
作者
Dai, Steve [1 ,2 ]
Zhang, Zhiru [2 ]
机构
[1] Cornell Univ, Sch Elect & Comp Engn, Ithaca, NY 14850 USA
[2] NVIDIA, Santa Clara, CA 95051 USA
来源
PROCEEDINGS OF THE 2019 56TH ACM/EDAC/IEEE DESIGN AUTOMATION CONFERENCE (DAC) | 2019年
基金
美国国家科学基金会;
关键词
D O I
10.1145/3316781.3317842
中图分类号
TP31 [计算机软件];
学科分类号
081202 ; 0835 ;
摘要
Loop pipelining is an important optimization in high-level synthesis to enable high-throughput pipelined execution of loop iterations. However, current pipeline scheduling approach relies on fundamentally inexact heuristics based on ad hoc priority functions and lacks guarantee on achieving the best throughput. To address this shortcoming, we propose a scheduling algorithm based on system of integer difference constraints (SDC) and Boolean satisfiability (SAT) to exactly handle various pipeline scheduling constraints. Our techniques take advantage of conflict-driven learning and problem-specific specialization to optimally yet efficiently derive pipelining solutions. Experiments demonstrate that our approach achieves notable speedup in comparison to integer linear programming based techniques.
引用
收藏
页数:6
相关论文
共 15 条
[1]  
Altman Erik R., 1998, INT J PARALLEL PROGR
[2]  
[Anonymous], 1972, SIAM J COMPUTING
[3]  
[Anonymous], INT S WORKL CHAR IIS
[4]  
Biere A., 2013, SAT Competition
[5]  
Canis A., 2014, 24 INT C FIELD PROGR
[6]  
Canis A, 2011, FPGA 11: PROCEEDINGS OF THE 2011 ACM/SIGDA INTERNATIONAL SYMPOSIUM ON FIELD PROGRAMMABLE GATE ARRAYS, P33
[7]  
Codina J. M., 2002, Conference Proceedings of the 2002 International Conference on SUPERCOMPUTING, P97, DOI 10.1145/514191.514208
[8]   An efficient and versatile scheduling algorithm based on SDC formulation [J].
Cong, Jason ;
Zhang, Zhiru .
43RD DESIGN AUTOMATION CONFERENCE, PROCEEDINGS 2006, 2006, :433-+
[9]   High-Level Synthesis for FPGAs: From Prototyping to Deployment [J].
Cong, Jason ;
Liu, Bin ;
Neuendorffer, Stephen ;
Noguera, Juanjo ;
Vissers, Kees ;
Zhang, Zhiru .
IEEE TRANSACTIONS ON COMPUTER-AIDED DESIGN OF INTEGRATED CIRCUITS AND SYSTEMS, 2011, 30 (04) :473-491
[10]  
Dai Steve, 2018, INT S FIELD PROGR GA