Performance investigation of a novel GaAs1-xSbx-on-insulator (GASOI) FinFET: Role of interface trap charges and hetero dielectric

被引:12
作者
Dixit, Ankit [1 ]
Samajdar, Dip Prakash [1 ]
Bagga, Navjeet [1 ]
Yadav, Dharmendra Singh [2 ]
机构
[1] Indian Inst Informat Technol, Elect & Commun Engn Discipline PDPM, VLSI Design & Nanoscale Computat Lab, Jabalpur 482005, India
[2] Natl Inst Technol, Hamirpur 177005, Himachal Prades, India
关键词
GaAs1-xSbx; Mole fraction; III-V materials; Interface traps; Hetero buried oxide; HIGH-K; OPTIMIZATION;
D O I
10.1016/j.mtcomm.2020.101964
中图分类号
T [工业技术];
学科分类号
08 ;
摘要
In this paper, for the first time we proposed a novel GaAs1-xSbx-on-Insulator (GASOI) FinFET on GaAS substrate using well calibrated simulation models. Impact of this novel channel material GaAs1-xSbx in FinFET performance is thoroughly investigated and optimized accordingly. The acquired results of the proposed device show a significant improvement in ON current with smaller OFF current, which in turn boosts I-ON/I-OFF ratio as compared to the earlier reported InGa1-xAsx and InGa1-xSbx FinFET. A maximum transconductance (gm) of similar to 1.3 mS/?m is achieved that signifies a higher intrinsic gain of the proposed device. The performance optimization can be done by varying various device dimensional parameters such as width and height of the Fin, channel length, along with the gate metal work-function. We have also investigated the impact of interface trap charges in the device performance and to mitigate the effect of random dopants, a novel idea to implement a Hetero Buried Oxide (BOX) layer over the GaAs1-xSbx SOI FinFET is discussed.
引用
收藏
页数:10
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