A Fully Fledged TDC Implemented in Field-Programmable-Gate-Arrays

被引：4

作者：

Wang, Jinhong ^{[1
]}

Liu, Shubin ^{[1
]}

Shen, Qi ^{[1
]}

Li, Hao ^{[1
]}

An, Qi ^{[1
]}

机构：

[1] Univ Sci & Technol China, Dept Modern Phys, Hefei, Peoples R China

来源：

2009 16TH IEEE-NPSS REAL TIME CONFERENCE | 2009年

关键词：

D O I：

10.1109/RTC.2009.5321997

中图分类号：

TP3 [计算技术、计算机技术];

学科分类号：

0812 ;

摘要：

The motivation of this paper is to implement a fully fledged FPGA-Based TDC in XILINX XC4VFX60 FPGAs, with the features of self-Test, temperature variation compensation and trigger-matching. Self-Test is performed with the statistical methods and gives the resolution of delay chain at its temperature and supplied voltage. The resolution chances with the environment temperature, and the corresponding value was recorded by Self-Test from 30 similar to 60 degrees C for compensation. After compensation and INL calibration. the RMS of time measurement remains less than 30 ps per channel of the total six, and the resolution is about 50 ps. Trigger-matching is implemented using content addressable memory with the two parameters: trigger-latency and matching window programmable.

引用

页码：290 / 294

页数：5

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