Integrating Thermocouple Sensors into 3D ICs

被引:0
作者
Li, Dawei [1 ]
Kim, Ji-Hoon [1 ]
Memik, Seda Ogrenci [1 ]
机构
[1] Northwestern Univ, Dept EECS, Evanston, IL 60208 USA
来源
2013 IEEE 31ST INTERNATIONAL CONFERENCE ON COMPUTER DESIGN (ICCD) | 2013年
关键词
3D IC; TSV (through silicon via); thermal monitoring; bi-metallic thermocouple; CHIP;
D O I
暂无
中图分类号
TP [自动化技术、计算机技术];
学科分类号
0812 ;
摘要
In this paper, we present a novel architecture for embedding bi-metallic thermocouple based temperature sensors into 3D IC stacks. To the best of our knowledge this is the first work addressing this specific integration problem. Our architecture uses dedicated vias to thermally couple sensors in the metal layer with the hotspots to be monitored in the active layer throughout the multi-stack structures. We propose a low cost solution by leveraging a fraction of existing thermal TSVs for this purpose. Through thermal modeling and simulation using a state-of-the-art tool (FloTHERM), we demonstrate that we can achieve high accuracy (less than 1 degrees C error) in temperature tracking while still maintaining the effectiveness of the thermal TSVs in heat management (conforming to a fixed peak temperature threshold of 95 degrees C).
引用
收藏
页码:221 / 226
页数:6
相关论文
共 50 条
  • [1] End-to-End Analysis of Integration for Thermocouple-Based Sensors Into 3-D ICs
    Li, Dawei
    Joshi, Siddhartha
    Kim, Ji-Hoon
    Ogrenci-Memik, Seda
    IEEE TRANSACTIONS ON VERY LARGE SCALE INTEGRATION (VLSI) SYSTEMS, 2017, 25 (09) : 2498 - 2511
  • [2] Trend from ICs to 3D ICs to 3D Systems
    Tummala, Rao R.
    Sundaram, Venky
    Chatterjee, Ritwik
    Raj, P. Markondeya
    Kumbhat, Nitesh
    Sukumaran, Vijay
    Sridharan, Vivek
    Choudury, Abhishek
    Chen, Qiao
    Bandyopadhyay, Tapobrata
    PROCEEDINGS OF THE IEEE 2009 CUSTOM INTEGRATED CIRCUITS CONFERENCE, 2009, : 439 - 444
  • [3] Power, Performance, and Cost Comparisons of Monolithic 3D ICs and TSV-based 3D ICs
    Nayak, Deepak Kumar
    Banna, Srinivasa
    Samal, Sandeep Kumar
    Lim, Sung Kyu
    2015 IEEE SOI-3D-SUBTHRESHOLD MICROELECTRONICS TECHNOLOGY UNIFIED CONFERENCE (S3S), 2015,
  • [4] Modeling Hardware Trojans in 3D ICs
    Zhang, Zhiming
    Yu, Qiaoyan
    2019 IEEE COMPUTER SOCIETY ANNUAL SYMPOSIUM ON VLSI (ISVLSI 2019), 2019, : 485 - 490
  • [5] Investigation of the Dynamics of Liquid Cooling of 3D ICs
    Islam, Sakib
    Motaleb, Ibrahim Abdel
    2019 8TH INTERNATIONAL SYMPOSIUM ON NEXT GENERATION ELECTRONICS (ISNE), 2019,
  • [6] Integrated Power Delivery Methodology for 3D ICs
    Safari, Yousef
    Vaisband, Boris
    PROCEEDINGS OF THE TWENTY THIRD INTERNATIONAL SYMPOSIUM ON QUALITY ELECTRONIC DESIGN (ISQED 2022), 2022, : 114 - 119
  • [7] Capacitive and Inductive TSV-to-TSV Resilient Approaches for 3D ICs
    Yaghini, Pooria M.
    Eghbal, Ashkan
    Yazdi, Siavash S.
    Bagherzadeh, Nader
    Green, Michael M.
    IEEE TRANSACTIONS ON COMPUTERS, 2016, 65 (03) : 693 - 705
  • [8] Power efficiency of 3D vs 2D ICs
    Chrzanowska-Jeske, M.
    Ahmed, Mohammad A.
    2013 IEEE FAIBLE TENSION FAIBLE CONSOMMATION (FTFC), 2013,
  • [9] Placement of 3D ICs with thermal and interlayer via considerations
    Goplen, Brent
    Sapatnekar, Sachin
    2007 44TH ACM/IEEE DESIGN AUTOMATION CONFERENCE, VOLS 1 AND 2, 2007, : 626 - +
  • [10] Redundant vias insertion for performance enhancement in 3D ICs
    Zhang, Xu
    Jiang, Xiaohong
    Horiguchi, Susumu
    IEICE TRANSACTIONS ON ELECTRONICS, 2008, E91C (04): : 571 - 580