Analytical model for thin-film SOI PIN-diode leakage current

被引：3

作者：

Schmidt, Andrei ^{[1
]}

Dreiner, Stefan ^{[1
]}

Vogt, Holger ^{[1
]}

Goehlich, Andreas ^{[1
]}

Paschen, Uwe ^{[1
]}

机构：

[1] Fraunhofer Inst Microelect Circuits & Syst, Duisburg, Germany

来源：

SOLID-STATE ELECTRONICS | 2017年 / 130卷

关键词：

Analytical model; Leakage current; p-i-n diode; Silicon-on-insulator (SOI);

D O I：

10.1016/j.sse.2017.01.004

中图分类号：

TM [电工技术]; TN [电子技术、通信技术];

学科分类号：

0808 ; 0809 ;

摘要：

An analytical model for the thin-film silicon-on-insulator pin-diode leakage current is presented. Particularly the back-gate potential influence on the leakage current is addressed. The two-dimensional Poisson equation is simplified and then solved including the influence of the back-gate potential. Subsequently the analytical model is verified by comparison with numerical simulation and measurements. For the verification of the model the dependence on the back-gate potential, reverse voltage, device geometry, doping concentration and polarity is considered. In this procedure the interface recombination velocity is used as fitting parameter. The model verification shows an accurate modeling of the leakage current at full depletion in combination with a back-gate potential dependence. The usage of the model is limited to back-gate and reverse potentials close to full depletion state of the pin-diode. (C) 2017 Elsevier Ltd. All rights reserved.

引用

页码：4 / 8

页数：5

共 18 条

[1]

Afzalian A., 2006, 2006 IEEE International SOI Conference (IEEE Cat. No. 06CH37786), P83, DOI 10.1109/SOI.2006.284444

[2] Physical modeling and design of thin-film SOI lateral PIN photodiodes [J].

Afzalian, A ;

Flandre, D .

IEEE TRANSACTIONS ON ELECTRON DEVICES, 2005, 52 (06) :1116-1122

[3] Characterization of quantum efficiency, effective lifetime and mobility in thin film ungated SOI lateral PIN photodiodes [J].

Afzalian, Aryan ;

Flandre, Denis .

SOLID-STATE ELECTRONICS, 2007, 51 (02) :337-342

[4]

[Anonymous], 2012, Sentaurus Device User Guide

[5]

Boksteen B. K., 2012, P IEDM, P1341

[6]

de Souza M., 2011, Journal of Integrated Circuits and Systems, V6, P107

[7]

Kappert H., 2014, P HITECH, P154

[8] Analysis and simulation for current-voltage models of thin-film gated SOI lateral PIN photodetectors [J].

Li, Guoli ;

Zeng, Yun ;

Hu, Wei ;

Xia, Yu .

OPTIK, 2014, 125 (01) :540-544

[9] Analytical model for the electric field distribution in SOI RESURF and TMBS structures [J].

Merchant, S .

IEEE TRANSACTIONS ON ELECTRON DEVICES, 1999, 46 (06) :1264-1267

[10] Illuminated to dark ratio improvement in lateral SOI PIN photodiodes at high temperatures [J].

Novo, C. ;

Giacomini, R. ;

Doria, R. ;

Afzalian, A. ;

Flandre, D. .

SEMICONDUCTOR SCIENCE AND TECHNOLOGY, 2014, 29 (07)

← 1 2 →