Generalized Minimum Common-Mode Voltage PWM for Two-Level Multiphase VSIs Considering Reference Order

被引:52
作者
Chen, Keng-Yuan [1 ]
Hsieh, Meng-Sheng [1 ,2 ]
机构
[1] Yuan Ze Univ, Dept Elect Engn, Taoyuan 320, Taiwan
[2] TECO Corp, Taoyuan 320, Taiwan
关键词
Common-mode voltage (CMV); multiphase voltage source inverter (VSI); pulse width modulation (PWM); SPACE-VECTOR PWM; INDUCTION-MOTOR; BEARING CURRENTS; INVERTER; REDUCTION; 3-PHASE; PERFORMANCE; ALGORITHM; MACHINES; DRIVES;
D O I
10.1109/TPEL.2016.2615111
中图分类号
TM [电工技术]; TN [电子技术、通信技术];
学科分类号
0808 ; 0809 ;
摘要
A minimum common-mode voltage (CMV) pulsewidth modulator (MCMV_ PWM) is proposed for generalized two-level N-phase voltage-source inverters (VSIs) with odd phase numbers. The CMV engenders the breakdown of winding insulation, electromagnetic interference, and leakage currents. Recently, many CMV reduction/elimination PWMs have been widely discussed, but those discussions have mainly focused on the topologies of multilevel inverters or dual-inverter drives for open-endedwindings. Therefore, in this study, a two-level multiphase VSI that can be applied to multiphase motor drives, in general, is considered. The relation between switching states and the CMV is derived first. Subsequently, the CMV is minimized using two different leg distributions: double-sided and central distributions. Consequently, for an N-phase VSI, the proposed method reduces the maximum CMV to V-dc/(2N); that CMV is lower than the maximum CMV of the conventional space-vector PWM (SVPWM), namely V-dc/2. In experiments, five-phase and seven-phase VSIs were constructed. The waveforms of the CMV, phase voltage, and phase current produced by the SVPWM and the proposed MCMV_ PWM confirm the practicality of CMV minimization.
引用
收藏
页码:6493 / 6509
页数:17
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