High performance two-phase asynchronous pipelines

被引：0

作者：

Appleton, S

Morton, S

Liebelt, M

机构：

来源：

IEICE TRANSACTIONS ON INFORMATION AND SYSTEMS | 1997年 / E80D卷 / 03期

关键词：

asynchronous; high performance; pipeline (architecture); computer design;

D O I：

暂无

中图分类号：

TP [自动化技术、计算机技术];

学科分类号：

0812 ;

摘要：

In this paper we describe the implementation of complex architectures using a general design approach for two-phase asynchronous systems. This fundamental approach, called Event Controlled Systems, can be used to widely extend the utility of two phase systems. We describe solutions that we have developed that dramatically improve the performance of static and dynamic-logic asynchronous pipelines, and briefly describe a complex microprocessor designed using ECS.

引用

页码：287 / 295

页数：9