Tunable Floating Capacitance Multiplier Using Single Fully Balanced Voltage Differencing Buffered Amplifier

被引:20
|
作者
Tangsrirat, W. [1 ]
Channumsin, O. [2 ]
机构
[1] King Mongkuts Inst Technol Ladkrabang KMITL, Fac Engn, Bangkok 10520, Thailand
[2] Rajamangala Univ Technol Isan, Fac Engn, Khonkaen Campus, Muang Khonkean 40000, Khonkaen, Thailand
关键词
fully balanced-voltage differencing buffered amplifier (FB-VDBA); capacitance multiplier; floating impedance simulator; electronically tunable circuit; band-pass filter; SIMULATOR;
D O I
10.1134/S1064226919080163
中图分类号
TM [电工技术]; TN [电子技术、通信技术];
学科分类号
0808 ; 0809 ;
摘要
An alternative circuit configuration for realizing an electronically adjustable floating capacitance multiplier is presented in this article. By consisting of only one fully balanced-voltage differencing buffered amplifier (FB-VDBA), one resistor and one capacitor, the presented multiplier circuit is canonical structure, and does not require any critical element matching constrain. The equivalent value of the simulated capacitance is adjustable by tuning the bias current of the FB-VDBA. The effect of the FB-VDBA non-idealities on the realized capacitance has been considered in detail. The proposed floating capacitance multiplier has been utilized, as an example application, in the design of a second-order RLC band-pass filter. To support the theory, some computer simulations with PSPICE software are also reported.
引用
收藏
页码:797 / 803
页数:7
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