Current reuse topology in UWB CMOS LNA

Low power low voltage operation is found to be the bottleneck of future CMOS system implementations. To comply with these constrains, a current reuse configuration is here reported to design UWB Low Noise Amplifiers (LNA). A resistive feedback topology is first proposed performing an 11.5 dB gain over a 2 to 9 GHz range. Consuming a 17 mW under 1.4 V, this circuit achieves a 4.45 dB minimum Noise Figure (NFmin). Current reuse approach is then combined with LC ladder technique to cover the upper band of European UWB-i.e. 6 to 10 GHz-. This second LNA provides a 12.2 dB, 4.4 dB NFmin, from 5.6 to 8.8 GHz. Operating under 1.6 V it solely consumes 5 mW. Considering a 1.2 V supply voltage case, the two circuits still exhibit a more than 9 and 11 dB gain respectively. Implemented in a 0.13 mu m CMOS technology, silicon areas are 0.6 mmA(2) for resistive feedback amplifier, and 1 mmA(2) for LC ladder, with PADS.