This paper proposes a novel 12T radiation-hardened memory cell (RHMC-12T) for aerospace application. The proposed design consists of quad-nodes, which stores the data. The architecture consists of only two sensitive nodes, which reduces the total sensitive area compared to the existing radiation-hardened memory cells. It can tolerate both "1" to "0" and "0" to "1" upset at any of the sensitive nodes. The proposed architecture is designed in 65-nm CMOS technology at a supply voltage of 1.2 V. The read and write access times of the proposed design are 80.81 ps and 70.19 ps respectively.