Research on a step delay method in sequential equivalent time sampling (ETS)

Sequential equivalent time sampling (ETS) has been extensively used in data acquisition instruments (e.g., sampling oscilloscopes and time domain reflectometers). A novel step delay method is proposed based on the frequency difference to obtain a higher sampling rate in sequential ETS. It is different from the classic step delay methods and is capable of increasing the sampling rate. The sampling clock and the repetitive signal are taken as examples in this study. The time-frequency conversion relationship indicates that a fine step delay will be generated in the time domain if there is a frequency difference between the two in the frequency domain. The core of the proposed method is the selection of the appropriate frequency difference (step delay) according to the desired equivalent sampling rate. Two experiments were performed to verify the proposed method. The feasibility of the proposed method is verified using a digital storage oscilloscope. Four cases are examined in the experiment, and the final equivalent sampling rate is obtained as 5 PS/s for the equivalent sampling of a 4.999995 GHz (or higher) signal. A data acquisition system with a 10 MS/s real-time sampling rate is designed to verify the feasibility of the proposed method, obtaining a theoretical equivalent sampling rate of 585 GS/s. The theoretical equivalent sampling rate and the examined equivalent sampling rate are consistent. The equivalent sampling waveform and real-time sampling waveform of a 1 GHz signal are compared, and the comparison result suggests that the proposed method can acquire more waveform information. The proposed method obtains a high equivalent sampling rate for repetitive signals, and techniques (e.g., oversampling) are given to obtain higher vertical resolution. The proposed method, combined with a sample-and-hold amplifier, can also achieve a higher analog bandwidth.