Chip/Package/Board Co-Design Methodology Applied to Full-Custom Heterogeneous Integration

被引：2

作者：

Brandtner, Thomas ^{[1
]}

Pressel, Klaus ^{[2
]}

Floman, Natalia ^{[1
]}

Schultz, Michael ^{[3
]}

Vogl, Michael ^{[3
]}

机构：

[1] Austria AG, Infineon Technol, Villach, Austria

[2] Infineon Technol AG, Regensburg, Germany

[3] Infineon Technol AG, Munich, Germany

来源：

2020 IEEE 70TH ELECTRONIC COMPONENTS AND TECHNOLOGY CONFERENCE (ECTC 2020) | 2020年

关键词：

chip/package/board co-design flow; design methodology; EDA; CAD; system-in-package; assembly design kit; CHIP;

D O I：

10.1109/ECTC32862.2020.00269

中图分类号：

TM [电工技术]; TN [电子技术、通信技术];

学科分类号：

0808 ; 0809 ;

摘要：

Heterogeneous integration leads to significant increase in design complexity. We present a modular full-custom chip/package/board co-design environment based on a versatile backbone idea, which has been used successfully in various system-in-package (SiP) designs. We show challenges and solutions for co-design applied to traditional leadframe assembly and packaging (e.g. QFP, QFN, TO, SON, DSO) as well as more recent technologies like FOWLP or laminate BGA and LGA.

引用

页码：1718 / 1727

页数：10

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