A 30-GS/sec track and hold amplifier in 0.13-μm CMOS technology

被引：41

作者：

Shahramian, Shahriar ^{[1
]}

Voinigescu, Sorin P. ^{[1
]}

Carusone, Anthony Chan ^{[1
]}

机构：

[1] Univ Toronto, 100 Coll St, Toronto, ON M4X 1K9, Canada

来源：

PROCEEDINGS OF THE IEEE 2006 CUSTOM INTEGRATED CIRCUITS CONFERENCE | 2006年

基金：

加拿大自然科学与工程研究理事会;

关键词：

D O I：

10.1109/CICC.2006.320891

中图分类号：

TM [电工技术]; TN [电子技术、通信技术];

学科分类号：

0808 ; 0809 ;

摘要：

A 30-GS/sec CMOS track and hold amplifier (TIU) is designed and fabricated in a 0.13-mu m technology. The chip operates from a 1.8-V supply and consumes 270 mW. The THA employs a low noise TIA input stage and a switched source follower (SSF) track and hold block. The SSF topology overcomes the shortcomings of switched series transistors by eliminating the use of a series switch all together. The measured single-ended S-parameters show an input and output return loss of better than -10 dB up to 35 GHz and 7 GHz of bandwidth when the circuit is operated in track mode. The measured total harmonic distortion of the THA is better than -29 dB.

引用

页码：493 / 496

页数：4

共 12 条

[1] A 10-b 185-MS/s track-and-hold in 0.35-μm CMOS [J].

Boni, A ;

Pierazzi, A ;

Morandi, C .

IEEE JOURNAL OF SOLID-STATE CIRCUITS, 2001, 36 (02) :195-203

[2]

Garg A, 2005, COMP SEMICOND INTEGR, P37

[3] A 49-Gb/s, 7-tap transversal filter in 0.18 μm SiGe BiCMOS for backplane equalization [J].

Hazneci, A ;

Voinigescu, SP .

2004 IEEE CSIC SYMPOSIUM, TECHNICAL DIGEST 2004: 26TH ANNIVERSARY: COMPOUNDING YOUR CHIPS IN MONTEREY, 2004, :101-104

[4] A 6-b 12-GSamples/s track-and-hold amplifier in InP DHBT technology [J].

Lee, J ;

Leven, A ;

Weiner, JS ;

Baeyens, Y ;

Yang, Y ;

Sung, WJ ;

Frackoviak, J ;

Kopf, RF ;

Chen, YK .

IEEE JOURNAL OF SOLID-STATE CIRCUITS, 2003, 38 (09) :1533-1539

[5] An 8-bit, 12 GSample/sec SiGe track-and-hold amplifier [J].

Lu, Y ;

Kuo, WML ;

Li, XT ;

Krithivasan, R ;

Cressler, JD ;

Borokhovych, Y ;

Gustat, H ;

Tillack, B ;

Heinemann, B .

PROCEEDINGS OF THE 2005 BIPOLAR/BICMOS CIRCUITS AND TECHNOLOGY MEETING, 2005, :148-151

[6]

PERA F, 2006, IN PRESS RFIC JUN

[7]

Sato T, 2004, ESSCIRC 2004: PROCEEDINGS OF THE 30TH EUROPEAN SOLID-STATE CIRCUITS CONFERENCE, P347

[8]

SCHVAN P, 2006, SOL STAT CIRC C IEEE, P572

[9]

Shahramian S, 2005, COMP SEMICOND INTEGR, P101

[10]

TCHAMOV N, 2003, ELECT LETT JAN, P180

← 1 2 →