Impact of scaling on the effectiveness of dynamic power reduction schemes

被引:29
作者
Duarte, D [1 ]
Vijaykrishnan, N [1 ]
Irwin, MJ [1 ]
Kim, HS [1 ]
McFarland, G [1 ]
机构
[1] Intel Corp, Santa Clara, CA 95051 USA
来源
ICCD'2002: IEEE INTERNATIONAL CONFERENCE ON COMPUTER DESIGN: VLSI IN COMPUTERS AND PROCESSORS, PROCEEDINGS | 2002年
关键词
D O I
10.1109/ICCD.2002.1106798
中图分类号
TP3 [计算技术、计算机技术];
学科分类号
0812 ;
摘要
Power is considered to be the major limiter to the design of more faster and complex processors in the near future. In order to address this challenge, a combination of process, circuit design and micro-architectural changes are required Consequently, to focus the optimization efforts in the right direction, the models proposed and studies performed in this work are a first step for understanding the relative importance of leakage and dynamic energy in future technologies. Further, we analyze the effectiveness of two energy reduction mechanisms that employ voltage scaling, namely, supply and threshold voltage selection. We consider the impact of imminent technology changes and packaging improvements while showing that neglecting the impact of temperature may lead to underestimate the power savings by up to 19.5%.
引用
收藏
页码:382 / 387
页数:6
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