Research on Cache Coherence Key Technology in Multi-core Processor System

被引：0
|
作者：
Zhang, Su [1 ]
机构：
[1] Gansu Normal Univ Nationalities, Dept Comp Sci, Hezuo 747000, Gansu, Peoples R China
来源：
PROCEEDINGS OF THE 2016 4TH INTERNATIONAL CONFERENCE ON ELECTRICAL & ELECTRONICS ENGINEERING AND COMPUTER SCIENCE (ICEEECS 2016) | 2016年 / 50卷
关键词：
Cache; Coherence Key Technology; Multi-core Processor System;
D O I：
暂无
中图分类号：
TP18 [人工智能理论];
学科分类号：
081104 ; 0812 ; 0835 ; 1405 ;
摘要：
The multi-core processor integrates more than one computing core into a single processor and enhances the processor's computing performance through parallel computing of multiple cores. Single-chip multi-processor architecture is the area of concern. This paper briefly discusses the CMP multi-level Cache storage structure, the multi-level structure of the cache caused the consistency problem and the choice of consistency agreement has an important impact on CMP system performance. What kind of Cache consistency model is used and its design scheme are the main contents of this paper.
引用
收藏
页码：206 / 209
页数：4
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