Implementation of Trench-based Power LDMOS and Low Voltage MOSFET on InGaAs

In this paper, we propose a design concept of integration of trench-based power and low voltage small signal metal-oxide-semiconductor field-effect transistors (MOSFETs) on high mobility InGaAs material. A high power dual-trench-gate (DTG) MOSFET and a low voltage MOSFET are implemented side by side in same InGaAs epitaxial layer using junction isolation technique. The high voltage DTG-MOSFET has two gates which are placed in oxide-filled trenches in the drift region. This structure provides a better trade-off between specific on-resistance (Ron-sp) and breakdown voltage (V-br) due to the formation of dual conduction channels and enhancement in reduced-surface-field (RESURF) effect caused by folding of the drift region in the vertical direction. Further, simultaneous conduction of channels increases the drain current (I-D) and transconductance (g(m)) leading to better cut-off frequency (f(t)) and maximum oscillation frequency (f(max)). On the other hand, the gate of low voltage MOSFET is placed in an oxide trench to make two n-channels in the p-base. The parallel conduction of two channels gives substantial improvement in I-D, peak g(m), f(t) and f(max) with good control over the short channel effects. Two-dimensional simulations are carried out to evaluate the performance of both high voltage and low voltage MOSFETs.