Exploring Image Selection for Self-Testing in Neural Network Accelerators

被引:6
作者
Meng, Fanruo [1 ]
Yang, Chengmo [1 ]
机构
[1] Univ Delaware, Dept Elect & Comp Engn, Newark, DE 19716 USA
来源
2022 IEEE COMPUTER SOCIETY ANNUAL SYMPOSIUM ON VLSI (ISVLSI 2022) | 2022年
基金
美国国家科学基金会;
关键词
DNN Accelerator Reliability; Fault Detection; Self-testing; CHALLENGES;
D O I
10.1109/ISVLSI54635.2022.00076
中图分类号
TP3 [计算技术、计算机技术];
学科分类号
0812 ;
摘要
Hardware accelerators are essential to the accommodation of computation and memory-intensive neural network (NN) applications on resource-constrained edge devices. While hardware accelerators facilitate fast and energy-efficient convolution operations, their accuracy is threatened by various types of faults in their on-chip and off-chip memories, where millions of NN weights are held. To achieve fast and in-time fault detection, a self-test process that periodically runs a small set of test images in the accelerator can be adopted. This paper focuses on developing and comparing multiple numerical score based test image selection strategies. Various image selection criteria are studied, including output probability distribution, gradient sensitivity, and neuron coverage. Experimental studies show that images selected based on the output probability distribution offers high fault detection accuracy over a wide range of fault rates as well as low computation complexity. The small set of test images allows for real-time monitoring of the healthiness of DNN accelerators as well as the subsequent recovery and self-healing process.
引用
收藏
页码:345 / 350
页数:6
相关论文
共 31 条
[1]   High precision tuning of state for memristive devices by adaptable variation-tolerant algorithm [J].
Alibart, Fabien ;
Gao, Ligang ;
Hoskins, Brian D. ;
Strukov, Dmitri B. .
NANOTECHNOLOGY, 2012, 23 (07)
[2]  
[Anonymous], 2015, 3 INT C LEARN REPR I
[3]   RRAM Defect Modeling and Failure Analysis Based on March Test and a Novel Squeeze-Search Scheme [J].
Chen, Ching-Yi ;
Shih, Hsiu-Chuan ;
Wu, Cheng-Wen ;
Lin, Chih-He ;
Chiu, Pi-Feng ;
Sheu, Shyh-Shyuan ;
Chen, Frederick T. .
IEEE TRANSACTIONS ON COMPUTERS, 2015, 64 (01) :180-190
[4]  
Chen LR, 2017, DES AUT TEST EUROPE, P19, DOI 10.23919/DATE.2017.7926952
[5]  
Chollet F., 2015, Keras
[6]   Trends and challenges in VLSI circuit reliability [J].
Constantinescu, C .
IEEE MICRO, 2003, 23 (04) :14-19
[7]  
Cook C, 2018, INT C SYNTH MODEL AN, P5, DOI 10.1109/SMACD.2018.8434890
[8]   Making Memristive Neural Network Accelerators Reliable [J].
Feinberg, Ben ;
Wang, Shibo ;
Ipek, Engin .
2018 24TH IEEE INTERNATIONAL SYMPOSIUM ON HIGH PERFORMANCE COMPUTER ARCHITECTURE (HPCA), 2018, :52-65
[9]   Deep Residual Learning for Image Recognition [J].
He, Kaiming ;
Zhang, Xiangyu ;
Ren, Shaoqing ;
Sun, Jian .
2016 IEEE CONFERENCE ON COMPUTER VISION AND PATTERN RECOGNITION (CVPR), 2016, :770-778
[10]  
He Z., 2019, Proceedings of the IEEE Conference on Computer Vision and Pattern Recognition (CVPR)