Implementation of a comprehensive and robust MOSITET model in cadence SPICE for ESD applications

被引:16
作者
Gao, XF [1 ]
Liou, JJ
Bernier, J
Croft, G
Ortiz-Conde, A
机构
[1] Univ Cent Florida, Sch Elect Engn & Comp Sci, Orlando, FL 32816 USA
[2] Intersil Corp, Reliabil Engn Dept, Palm Bay, FL 32905 USA
[3] Intersil Corp, Technol Dev Dept, Palm Bay, FL 32905 USA
[4] Univ Simon Bolivar, Dept Elect Engn, Caracas, Venezuela
关键词
electrostatic discharge; modeling; MOSFET; SPICE;
D O I
10.1109/TCAD.2002.804379
中图分类号
TP3 [计算技术、计算机技术];
学科分类号
0812 ;
摘要
Electrostatic discharge (ESD) is a critical reliability concern for microchips. This paper presents a comprehensive computer-aided design tool for ESD applications. Specifically, the authors develop an improved and robust MOS model and implement such a model into the industry standard Cadence SPICE for ESD circuit simulation. The key components relevant to ESD in the MOS model are studied and the implementation procedure is discussed. Experimental data measured from the human body model tester are included in support of the model.
引用
收藏
页码:1497 / 1502
页数:6
相关论文
共 20 条
[1]  
Amerasekera A, 1996, 1996 IEEE INTERNATIONAL RELIABILITY PHYSICS PROCEEDINGS, 34TH ANNUAL, P318, DOI 10.1109/RELPHY.1996.492137
[2]  
Amerasekera A., 1995, ESD SILICON INTEGRAT
[3]   BIPOLAR-TRANSISTOR MODELING OF AVALANCHE GENERATION FOR COMPUTER CIRCUIT SIMULATION [J].
DUTTON, RW .
IEEE TRANSACTIONS ON ELECTRON DEVICES, 1975, ED22 (06) :334-338
[4]   An improved model for substrate current of submicron MOSFETs [J].
Gao, X ;
Liou, JJ ;
Bernier, J ;
Croft, G .
SOLID-STATE ELECTRONICS, 2002, 46 (09) :1395-1398
[5]   A physics-based model for the substrate resistance of MOSFETs [J].
Gao, XF ;
Liou, JJ ;
Ortiz-Conde, A ;
Bernier, J ;
Croft, G .
SOLID-STATE ELECTRONICS, 2002, 46 (06) :853-857
[6]  
Gupta V, 1998, ELECTRICAL OVERSTRESS/ELECTROSTATIC DISCHARGE SYMPOSIUM PROCEEDINGS, P161
[7]  
HSU FC, 1982, IEEE T ELECTRON DEV, V29, P1735
[8]  
HSU FC, 1982, IEEE T ELECT DEVI ED, V29
[9]   PRE-TURN-ON SOURCE BIPOLAR INJECTION IN GRADED NMOSTS [J].
JANKOVIC, ND .
IEEE TRANSACTIONS ON ELECTRON DEVICES, 1991, 38 (11) :2527-2530
[10]  
Lim SL, 1997, SISPAD '97 - 1997 INTERNATIONAL CONFERENCE ON SIMULATION OF SEMICONDUCTOR PROCESSES AND DEVICES, P161, DOI 10.1109/SISPAD.1997.621362