A Sub-1V Low-Dropout Regulator with an On-chip Voltage Reference

A sub-1V 50mA low-dropout regulator (LDR) with an on-chip voltage reference is presented. This LDR utilizes the push-pull output stage to reduce the size of the power PMOS transistor. The proposed LDR with the on-chip voltage reference has been fabricated in 0.18 mu m CMOS process, and its active area is 0.148mm(2). Experimental results demonstrate that the voltage reference and the LDR work for the supply voltage of 0.6V similar to 1.2V. For the proposed LDR under a supply of 0.6V, the measured settling time, voltage dip, and quiescent current are less than 2 mu s, 50mV, and 16.6 mu A, respectively.