Soft fault diagnosis of non-linear circuits having multiple DC solutions

被引:0
作者
Tadeusiewicz, Michal [1 ]
Halgas, Stanislaw [1 ]
机构
[1] Lodz Univ Technol, Dept Elect Elect Comp & Control Engn, Stefanowskiego 18-22, PL-90924 Lodz, Poland
关键词
fault diagnosis; nonlinear network analysis; CMOS integrated circuits; integrated circuit testing; nonlinear circuits; multiple DC solutions; single soft fault diagnosis; measurement test; input-output terminals; modified circuit; exciting voltage; CMOS technology; bipolar technology; POINT SELECTION METHOD; ANALOG CIRCUITS; ALGORITHM;
D O I
10.1049/iet-cds.2020.0197
中图分类号
TM [电工技术]; TN [电子技术、通信技术];
学科分类号
0808 ; 0809 ;
摘要
This study deals with a single soft fault diagnosis of non-linear circuits having multiple DC solutions. The key problem of the diagnosis is arranging a measurement test. Creation of the test for the above-defined class of circuits is discussed in detail. It is assumed that only input and output terminals are accessible in the circuit. The test is created based on some single-valued input or transfer characteristics traced in a modified circuit. The modification does not disturb the integrity of the circuit and is realised by connecting some components to the accessible terminals. A very fast method for tracing the characteristics is developed. Having appropriate characteristics several values of the exciting voltage are chosen and the corresponding values of voltage or current defined by the characteristic are measured in the course of testing. The method for arranging the measurement test is illustrated using four non-linear circuits having multiple DC solutions and three of them were built in bipolar and complementary metal-oxide-semiconductor (CMOS) technology. One of the circuits is comprehensibly diagnosed using a method for detecting, locating, and estimating values of different faulty parameters exploiting the proposed test.
引用
收藏
页码:1220 / 1227
页数:8
相关论文
共 50 条
[11]   A method for the analysis of transistor circuits having multiple DC solutions [J].
Tadeusiewicz, Michal ;
Halgas, Stanislaw .
AEU-INTERNATIONAL JOURNAL OF ELECTRONICS AND COMMUNICATIONS, 2006, 60 (08) :582-589
[12]   Multiple Soft Fault Diagnosis of Nonlinear Circuits Using the Continuation Method [J].
Tadeusiewicz, Michal ;
Halgas, Stanislaw .
JOURNAL OF ELECTRONIC TESTING-THEORY AND APPLICATIONS, 2012, 28 (04) :487-493
[13]   Neural fault diagnosis techniques for non linear analogue circuits [J].
Madani, K ;
Bengharbi, A ;
Amarger, V .
APPLICATIONS AND SCIENCE OF ARTIFICIAL NEURAL NETWORKS III, 1997, 3077 :491-502
[14]   Soft fault diagnosis of linear circuits with the special attention paid to the circuits containing current conveyors [J].
Tadeusiewicz, Michal ;
Halgas, Stanislaw .
AEU-INTERNATIONAL JOURNAL OF ELECTRONICS AND COMMUNICATIONS, 2020, 115
[15]   Fault Diagnosis Method of Non-linear Analog Circuits Based on Volterra Series and SVM [J].
He, Huafeng ;
Chen, Yicheng ;
Yang, Zheng ;
Deng, Huixuan .
26TH CHINESE CONTROL AND DECISION CONFERENCE (2014 CCDC), 2014, :3217-3222
[16]   Multiple catastrophic fault diagnosis of linear circuits considering the component tolerances [J].
Tadeusiewicz, Michal ;
Halgas, Stanislaw .
2009 EUROPEAN CONFERENCE ON CIRCUIT THEORY AND DESIGN, VOLS 1 AND 2, 2009, :647-650
[17]   An algorithm for soft-fault diagnosis of linear and nonlinear circuits [J].
Tadeusiewicz, M ;
Halgas, S ;
Korzybski, M .
IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS I-FUNDAMENTAL THEORY AND APPLICATIONS, 2002, 49 (11) :1648-1653
[18]   Analysis of transistor circuits having multiple DC solutions with the thermal constraint [J].
Tadeusiewicz, Michal ;
Halgas, Stanislaw .
COMPEL-THE INTERNATIONAL JOURNAL FOR COMPUTATION AND MATHEMATICS IN ELECTRICAL AND ELECTRONIC ENGINEERING, 2011, 30 (04) :1350-1362
[19]   Fault diagnosis for multivariable non-linear systems based on non-linear spectrum feature [J].
Zhang, Jialiang ;
Cao, Jianfu ;
Gao, Feng .
TRANSACTIONS OF THE INSTITUTE OF MEASUREMENT AND CONTROL, 2017, 39 (07) :1017-1026
[20]   A method for Soft Fault Diagnosis of Linear Analog Circuits Using the Laplace Transform Technique [J].
Tadeusiewicz, Michal ;
Ossowski, Marek ;
Korzybski, Marek .
INTERNATIONAL JOURNAL OF ELECTRONICS AND TELECOMMUNICATIONS, 2021, 67 (03) :531-536