共 6 条
[1]
Amerasekera A., 1995, ESD SILICON INTEGRAT
[3]
Analysis and compact modeling of lateral DMOS power devices under ESD stress conditions
[J].
ELECTRICAL OVERSTRESS/ELECTROSTATIC DISCHARGE SYMPOSIUM PROCEEDINGS, 1999,
1999,
:1-10
[4]
Murari B., 1996, SMART POWER ICS TECH