Modelling and delay analysis of on-chip differential carbon nanotube interconnects

被引：6
作者：
Cheng, Zi-Han [1 ]
Zhao, Wen-Sheng [1 ]
Wang, Da-Wei [1 ]
Wang, Jing [1 ]
Dong, Linxi [1 ]
Wang, Gaofeng [1 ]
机构：
[1] Hangzhou Dianzi Univ, Sch Elect & Informat, Key Lab RF Circuits & Syst MOE, Hangzhou 310018, Zhejiang, Peoples R China
来源：
MICRO & NANO LETTERS | 2019年 / 14卷 / 05期
基金：
中国国家自然科学基金;
关键词：
transient response; integrated circuit interconnections; carbon nanotubes; integrated circuit modelling; on-chip differential carbon nanotube interconnects; differential signalling; modern integrated circuits; current-mode signalling schemes; odd-mode half-circuit model; differential CNT interconnects; TEMPERATURE-COEFFICIENT; VIBRATION; BUNDLES; COPPER; IMPACT;
D O I：
10.1049/mnl.2018.5166
中图分类号：
TB3 [工程材料学];
学科分类号：
0805 ; 080502 ;
摘要：
Differential signalling is widely used in modern integrated circuits to guarantee signal integrity. In this work, differential carbon nanotube (CNT) interconnects are studied, with both voltage- and current-mode signalling schemes considered. An odd-mode half-circuit model of the differential CNT interconnects is developed, with transient response and time delay captured accurately. Finally, based on interval analysis, the effects of parameter variations on the differential CNT interconnects are investigated.
引用
收藏
页码：505 / 510
页数：6
相关论文
共 33 条
  • [1] A Novel Unified Model for Copper and MLGNR Interconnects Using Voltage- and Current-Mode Signaling Schemes
    Agrawal, Yash
    Kumar, Mekala Girish
    Chandel, Rajeevan
    [J]. IEEE TRANSACTIONS ON ELECTROMAGNETIC COMPATIBILITY, 2017, 59 (01) : 217 - 227
  • [2] [Anonymous], 2011, INT TECHNOLOGY ROADM
  • [3] [Anonymous], J HUAIHAI I TECHNOLO
  • [4] Vibration analysis of single-walled carbon nanotubes using different gradient elasticity theories
    Ansari, R.
    Gholami, R.
    Rouhi, H.
    [J]. COMPOSITES PART B-ENGINEERING, 2012, 43 (08) : 2985 - 2989
  • [5] Current-mode signaling in deep submicrometer global interconnects
    Bashirullah, R
    Liu, WT
    Cavin, RK
    [J]. IEEE TRANSACTIONS ON VERY LARGE SCALE INTEGRATION (VLSI) SYSTEMS, 2003, 11 (03) : 406 - 417
  • [6] Investigation of Copper-Carbon Nanotube Composites as Global VLSI Interconnects
    Cheng, Zi-Han
    Zhao, Wen-Sheng
    Dong, Linxi
    Wang, Jing
    Zhao, Peng
    Gao, Haijun
    Wang, Gaofeng
    [J]. IEEE TRANSACTIONS ON NANOTECHNOLOGY, 2017, 16 (06) : 891 - 900
  • [7] Circuit Models of Carbon-Based Interconnects for Nanopackaging
    Chiariello, Andrea Gaetano
    Maffucci, Antonio
    Miano, Giovanni
    [J]. IEEE TRANSACTIONS ON COMPONENTS PACKAGING AND MANUFACTURING TECHNOLOGY, 2013, 3 (11): : 1926 - 1937
  • [8] Controlled growth of CNT in mesoporous AAO through optimized conditions for membrane preparation and CVD operation
    Ciambelli, P.
    Arurault, L.
    Sarno, M.
    Fontorbes, S.
    Leone, C.
    Datas, L.
    Sannino, D.
    Lenormand, P.
    Du Plouy, S. Le Blond
    [J]. NANOTECHNOLOGY, 2011, 22 (26)
  • [9] A Variation Tolerant Current-Mode Signaling Scheme for On-Chip Interconnects
    Dave, Marshnil
    Jain, Mahavir
    Baghini, Maryam Shojaei
    Sharma, Dinesh
    [J]. IEEE TRANSACTIONS ON VERY LARGE SCALE INTEGRATION (VLSI) SYSTEMS, 2013, 21 (02) : 342 - 353
  • [10] Interconnect limits on gigascale integration (GSI) in the 21st century
    Davis, JA
    Venkatesan, R
    Kaloyeros, A
    Beylansky, M
    Souri, SJ
    Banerjee, K
    Saraswat, KC
    Rahman, A
    Reif, R
    Meindl, JD
    [J]. PROCEEDINGS OF THE IEEE, 2001, 89 (03) : 305 - 324
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