Product mix optimization under required cycle time for semiconductor wafer fabrication

被引：0

作者：

Yu, Chih-Min ^{[1
,2
]}

Kuo, Chung-Jen ^{[2
]}

Chiu, Chih-Lin ^{[2
]}

Wen, Wei-Chin ^{[3
]}

Zhang, Minghua ^{[3
]}

机构：

[1] Natl Tsing Hua Univ, 6F,1,Jinshan 7th St, Hsinchu 30080, Taiwan

[2] YouThought Corp, 6F,1,Jinshan 7th St, Hsinchu 30080, Taiwan

[3] CSMC Technol Corp, 6F,1,Jinshan 7th St, Hsinchu 30080, Taiwan

来源：

2018 INTERNATIONAL SYMPOSIUM ON SEMICONDUCTOR MANUFACTURING (ISSM) | 2018年

关键词：

semicounductor; product mix; neural networks; genetic algorithms; cycle time; GENETIC ALGORITHM; EXPLOIT;

D O I：

暂无

中图分类号：

T [工业技术];

学科分类号：

08 ;

摘要：

In the semiconductor wafer fabrication facility (fab), the development of models to determine product mix for a multi-stage, multi-site, and multi-generation company is very important. In this paper, we present to fill the gap by using neural networks (NNs) to model the impact of product mix on cycle time factors, such as "arrilval time", "process time", "usable tool", "Q-time constrain", "CV of process time", "number of recipes", "sampling rate", "hot lot ratio" and etc.. Through the interaction of various KPIs of genetic algorithms (GA), we seek a product mix that satisfies the optimization of the required cycle time. The results showed that seen the fab move could be improved 3.91% by the GA approach, and proposed approaches can help practitioners in a fab to determine the optimal product mix efficiently.

引用

页数：4

共 37 条

[31] Job cycle time estimation in a wafer fabrication factory with a bi-directional classifying fuzzy-neural approach
Toly Chen
The International Journal of Advanced Manufacturing Technology, 2011, 56 : 1007 - 1018
[32] Job cycle time estimation in a wafer fabrication factory with a bi-directional classifying fuzzy-neural approach
Chen, Toly
INTERNATIONAL JOURNAL OF ADVANCED MANUFACTURING TECHNOLOGY, 2011, 56 (9-12) : 1007 - 1018
[33] Predicting the Mean Cycle Time as a function of Throughput and Product Mix for Cluster Tool Workstations using EPT-based Aggregate Modeling
Veeger, C. P. L.
Etman, L. F. P.
van Herk, J.
Rooda, J. E.
2009 IEEE/SEMI ADVANCED SEMICONDUCTOR MANUFACTURING CONFERENCE, 2009, : 80 - +
[34] The Symmetric-Partitioning and Incremental-Relearning Classification and Back-Propagation-Network Tree Approach for Cycle Time Estimation in Wafer Fabrication
Chen, Toly
SYMMETRY-BASEL, 2014, 6 (02): : 409 - 426
[35] Development of two-level decision tree-based real-time scheduling system under product mix variety environment
Shiue, Yeou-Ren
ROBOTICS AND COMPUTER-INTEGRATED MANUFACTURING, 2009, 25 (4-5) : 709 - 720
[36] Data-driven aggregate modeling of a semiconductor wafer fab to predict WIP levels and cycle time distributions (Jun, 10.1007/s10696-023-09501-1, 2023)
Deenen, Patrick C.
Middelhuis, Jeroen
Akcay, Alp
Adan, Ivo J. B. F.
FLEXIBLE SERVICES AND MANUFACTURING JOURNAL, 2024, 36 (02) : 597 - 598
[37] Hybrid Particle Swarm Optimization Combined With Genetic Operators for Flexible Job-Shop Scheduling Under Uncertain Processing Time for Semiconductor Manufacturing
Jamrus, Thitipong
Chien, Chen-Fu
Gen, Mitsuo
Sethanan, Kanchana
IEEE TRANSACTIONS ON SEMICONDUCTOR MANUFACTURING, 2018, 31 (01) : 32 - 41

← 1 2 3 4 →