Product mix optimization under required cycle time for semiconductor wafer fabrication

被引：0
|
作者：
Yu, Chih-Min [1 ,2 ]
Kuo, Chung-Jen [2 ]
Chiu, Chih-Lin [2 ]
Wen, Wei-Chin [3 ]
Zhang, Minghua [3 ]
机构：
[1] Natl Tsing Hua Univ, 6F,1,Jinshan 7th St, Hsinchu 30080, Taiwan
[2] YouThought Corp, 6F,1,Jinshan 7th St, Hsinchu 30080, Taiwan
[3] CSMC Technol Corp, 6F,1,Jinshan 7th St, Hsinchu 30080, Taiwan
来源：
2018 INTERNATIONAL SYMPOSIUM ON SEMICONDUCTOR MANUFACTURING (ISSM) | 2018年
关键词：
semicounductor; product mix; neural networks; genetic algorithms; cycle time; GENETIC ALGORITHM; EXPLOIT;
D O I：
暂无
中图分类号：
T [工业技术];
学科分类号：
08 ;
摘要：
In the semiconductor wafer fabrication facility (fab), the development of models to determine product mix for a multi-stage, multi-site, and multi-generation company is very important. In this paper, we present to fill the gap by using neural networks (NNs) to model the impact of product mix on cycle time factors, such as "arrilval time", "process time", "usable tool", "Q-time constrain", "CV of process time", "number of recipes", "sampling rate", "hot lot ratio" and etc.. Through the interaction of various KPIs of genetic algorithms (GA), we seek a product mix that satisfies the optimization of the required cycle time. The results showed that seen the fab move could be improved 3.91% by the GA approach, and proposed approaches can help practitioners in a fab to determine the optimal product mix efficiently.
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页数：4
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