Joule heating effects in optimized insulator-based dielectrophoretic devices: An interplay between post geometry and temperature rise

被引:33
|
作者
Gallo-Villanueva, Roberto C. [1 ]
Perez-Gonzalez, Victor H. [1 ]
Cardenas-Benitez, Braulio [1 ]
Jind, Binny [1 ]
Martinez-Chapa, Sergio O. [1 ]
Lapizco-Encinas, Blanca H. [2 ]
机构
[1] Tecnol Monterrey, Sch Engn & Sci, Nanosensors & Devices Res Grp, Monterrey, NL, Mexico
[2] Rochester Inst Technol, Microscale Bioseparat Lab, Rochester, NY 14623 USA
基金
美国国家科学基金会;
关键词
Dielectrophoresis; Joule heating; Microfluidics; Sensors; Temperature; CELLS; SEPARATION; MANIPULATION; PARTICLES;
D O I
10.1002/elps.201800490
中图分类号
Q5 [生物化学];
学科分类号
071010 ; 081704 ;
摘要
Insulator-based dielectrophoresis (iDEP) is the electrokinetic migration of polarized particles when subjected to a non-uniform electric field generated by the inclusion of insulating structures between two remote electrodes. Electrode spacing is considerable in iDEP systems when compared to electrode-based DEP systems, therefore, iDEP systems require high voltages to achieve efficient particle manipulation. A consequence of this is the temperature increase within the channel due to Joule heating effects, which, in some cases, can be detrimental when manipulating biological samples. This work presents an experimental and modeling study on the increase in temperature inside iDEP devices. For this, we studied seven distinct channel designs that mainly differ from each other in their post array characteristics: post shape, post size and spacing between posts. Experimental results obtained using a custom-built copper Resistance Temperature Detector, based on resistance changes, show that the influence of the insulators produces a difference in temperature rise of approximately 4 degrees C between the designs studied. Furthermore, a 3D COMSOL model is also introduced to evaluate heat generation and dissipation, which is in good agreement with the experiments. The model allowed relating the difference in average temperature for the geometries under study to the electric resistance posed by the post array in each design.
引用
收藏
页码:1408 / 1416
页数:9
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