Implicit analytical surface/interface potential solutions for modeling strained-Si MOSFETs

被引：3
|
作者：
Chandrasekaran, Karthik [1 ]
Zhou, Xing
Ben Chiah, Siau
See, Guan Huei
Rustagi, Subhash C.
机构：
[1] Nanyang Technol Univ, Sch Elect & Elect Engn, Singapore 639798, Singapore
[2] Adv Micro Devices Inc, Sunnyvale, CA 94088 USA
[3] Inst Microelect, Singapore 117685, Singapore
来源：
IEEE TRANSACTIONS ON ELECTRON DEVICES | 2006年 / 53卷 / 12期
关键词：
compact model; heterostructure MOSFET; Poisson solution; SiGe; strained silicon (s-Si); surface potential;
D O I：
10.1109/TED.2006.885520
中图分类号：
TM [电工技术]; TN [电子技术、通信技术];
学科分类号：
0808 ; 0809 ;
摘要：
A new technique for calculating surface and interface potentials in heterostructure MOSFETs such as strained-Si/SiGe using an internal iteration approach is presented. It is based on the unified regional approach, with coupled iterative potential solutions at the surface and heterostructure interface, and it has been applied to modeling strained-Si/SiGe MOSFETs charge and capacitance in all bias regions, scalable for Ge mole fraction, strained-Si and SiGe layer thicknesses and doping. The formulations are shown for a buried-channel nMOSFET, and the approach to the solutions is generic to all heterostructures, which exhibit confinement of carriers at the different interfaces.
引用
收藏
页码：3110 / 3117
页数：8
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