Proposal for a memory transistor using phase-change and nanosize effects

被引:27
作者
Hosaka, S
Miyauchi, K
Tamura, T
Sone, H
Koyanagi, H
机构
[1] Gunma Univ, Grad Sch Engn, Dept Nanomat Syst, Kiryu, Gumma 3768515, Japan
[2] MIRAI Project, Tsukuba, Ibaraki 3058569, Japan
关键词
phase change; coulomb blockade; non-volatile memory; memory transistor;
D O I
10.1016/j.mee.2004.03.044
中图分类号
TM [电工技术]; TN [电子技术、通信技术];
学科分类号
0808 ; 0809 ;
摘要
We have proposed and demonstrated a memory transistor that has two functions of non-volatile memory action and electron current control (switching) using phase change (PC) and nanometer size effects. We have made a prototype transistor using a PC channel. The PC material was a GeSbTe thin film with a thickness of 50 nm. We demonstrated that the crystalline phase of the PC channel was changed to an amorphous phase, and the amorphous phase was changed to a crystalline phase by current heating of the channel. Furthermore, the channel current could be controlled by a gate bias. When the gate bias was made + 3 V, the source-drain current was suppressed to < 1/10 of that with a gate bias of -3 V. The proposed transistor promises to achieve an ultimate memory cell structure and to make an advance towards an ultra-high density non-volatile memory. (C) 2004 Elsevier B.V. All rights reserved.
引用
收藏
页码:736 / 740
页数:5
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