The Implementation methods of High Speed FIR Filter on FPGA

被引：0

作者：

Li, Ying ^{[1
]}

Peng, Chungan ^{[1
]}

Yu, Dunshan ^{[1
]}

Zhang, Xing ^{[1
]}

机构：

[1] Peking Univ, Key Lab Microelect Devices & Circuits, Inst Microelect, Beijing 100871, Peoples R China

来源：

2008 9TH INTERNATIONAL CONFERENCE ON SOLID-STATE AND INTEGRATED-CIRCUIT TECHNOLOGY, VOLS 1-4 | 2008年

关键词：

D O I：

暂无

中图分类号：

TM [电工技术]; TN [电子技术、通信技术];

学科分类号：

0808 ; 0809 ;

摘要：

This paper implements a sixteen-order high-speed Finite Impose Response (FIR) filter with four different popular methods: Conventional multiplications and additions; Full custom Distributed Arithmetic (DA) scheme; Add-and-Shift method with advanced calculation schedule. Each scheme is analyzed in detail including implementing process and advantages and/or drawbacks in order to present a practical reference. All of these implementations are aimed to implement on Xilinx Spartan 3 devices and we also compare our results with an industry result produced by Xilinx CoregenTM also using Distributed Arithmetic. The premium add-and-shift method observes up to 80% reduction in total occupied slices and 63.3% versus the largest conventional parallel multiplication implementation.

引用

页码：2208 / 2211

页数：4

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