Microprocessor Based Physical Unclonable Function

被引:2
作者
Kumar, Sudeendra K. [1 ]
Sahoo, Sauvagya [1 ]
Mahapatra, Abhishek [1 ]
Swain, Ayas Kanta [1 ]
Mahapatra, K. K. [1 ]
机构
[1] Natl Inst Technol, Rourkela, India
来源
2017 3RD IEEE INTERNATIONAL SYMPOSIUM ON NANOELECTRONIC AND INFORMATION SYSTEMS (INIS) | 2017年
关键词
Physical Unclonable function; Microprocessor; Hardware security;
D O I
10.1109/iNIS.2017.59
中图分类号
TM [电工技术]; TN [电子技术、通信技术];
学科分类号
0808 ; 0809 ;
摘要
Research on Physical Unclonable Functions (PUF) is well established topic in the field of hardware security. PUF is useful in many security applications like IC metering, IP protection and cryptographic key generation. The PUF circuits proposed in the past are dedicated circuits which are extra overhead in terms of area and power. Utilizing the existing circuit structures like microprocessor, power rails, etc to design PUF can be seen in recent literature. In this paper, we propose a PUF topology based on microprocessor and CRP generation method. We present the interim result in terms of hamming distance to prove sufficient randomness in path delays in the hardware multiplier of OpenMSP430 microprocessor which can be exploited to design the PUF. The simulation and statistical analysis technique is also discussed.
引用
收藏
页码:246 / 251
页数:6
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