M-sequence based M-ary/SS scheme for high bit rate transmission in DS/CDMA systems

被引：6

作者：

Ito, T ^{[1
]}

Sampei, S ^{[1
]}

Morinaga, N ^{[1
]}

机构：

[1] Osaka Univ, Grad Sch Engn, Dept Commun Engn, Suita, Osaka 5650871, Japan

来源：

ELECTRONICS LETTERS | 2000年 / 36卷 / 06期

关键词：

D O I：

10.1049/el:20000444

中图分类号：

TM [电工技术]; TN [电子技术、通信技术];

学科分类号：

0808 ; 0809 ;

摘要：

A high bit rate and high power efficiency transmission scheme is proposed which uses an M-sequence based M-ary/SS scheme for DS/CDMA systems combined with a block branch metric calculation for the Viterbi decoder and a signal to noise plus interference power ratio (SNIR) measurement scheme for transmitter power control (TPC). Computer simulation confirms that the proposed scheme leads to a much higher BER performance while maintaining a lower peak to average transmitter power ratio.

引用

页码：574 / 576

页数：3