An Efficient and Fast Algorithm for Realizing Recursive MDCT and IMDCT Computation

In this brief, an efficient and fast algorithm and the corresponding architecture of a hardware accelerator for realizing fast MDCT and IMDCT computation are proposed. The proposed algorithm based on type II discrete cosine transform and type II discrete sine transform takes only N/16+4 computing cycles for each output sequence. Compared with previous IMDCT algorithms, the proposed algorithm takes 45% fewer computational cycles for a 512-point decoding process while consumes the same number of hardware resources. In addition, the number of multiplications and additions of the proposed algorithm are respectively decreased by 60% and 80% than those of some well-known algorithms. As a result, the proposed architecture is better suitable for a VLSI realization of various audio applications.