A 44-mm2 four-bank eight-word page-read 64-Mb flash memory with flexible block redundancy and fast accurate word-line voltage controller

被引：2

作者：

Tanzawa, T ^{[1
]}

Umezawa, A

Taura, T

Shiga, H

Hara, T

Takano, Y

Miyaba, T

Tokiwa, N

Watanabe, K

Watanabe, H

Masuda, K

Naruke, K

Kato, H

Atsumi, S

机构：

[1] Toshiba Co Ltd, Yokohama, Kanagawa 2478585, Japan

[2] Toshiba Microelect Corp, Yokohama, Kanagawa 2478585, Japan

来源：

IEEE JOURNAL OF SOLID-STATE CIRCUITS | 2002年 / 37卷 / 11期

关键词：

0.16 mu m; 64; Mb; dual operation; flash memories; page read; redundancy; voltage controller;

D O I：

10.1109/JSSC.2002.802356

中图分类号：

TM [电工技术]; TN [电子技术、通信技术];

学科分类号：

0808 ; 0809 ;

摘要：

The highest bit-density 64-Mb NOR flash memory with dual-operation function of 44 mm(2) was developed by introducing negative-gate channel-erase NOR flash memory cell technology, 0.16-mum CMOS flash memory process technology, and four-bank hierarchical word-line and bit-line architecture. The chip has flexible block redundancy for high yield, a fast accurate word-line voltage controller for a fast erasing time of 0.5 s, and an eight-word page-read access capability for high read performance of an effective access time of 30 ns at a wide supply voltage range of 2.3-3.6 V.

引用

页码：1485 / 1492

页数：8