Flip chip bumping technology - Status and update

被引:37
作者
Wolf, M. Juergen [1 ]
Engelmann, Gunter [1 ]
Dietrich, Lothar [1 ]
Reichl, Herbert [1 ]
机构
[1] Fraunhofer IZM, D-13355 Berlin, Germany
关键词
packaging; flip chip; bumping; electroplating;
D O I
10.1016/j.nima.2006.05.046
中图分类号
TH7 [仪器、仪表];
学科分类号
0804 ; 080401 ; 081102 ;
摘要
Flip chip technology is a key driver for new complex system architectures and high-density packaging, e.g. sensor or pixel devices. Bumped wafers/dice as key elements become very important in terms of general availability at low cost, high yield and quality level. Today, different materials, e.g. An, Ni, AuSn, SnAg, SnAgCu, SnCu, etc., are used for flip chip interconnects and different bumping approaches are available. Electroplating is the technology of choice for high-yield wafer bumping for small bump sizes and pitches. Lead-free solder bumps require an increase in knowledge in the field of under bump metallization (UBM) and the interaction of bump and substrate metallization, the formation and growth of intermetallic compounds (IMCs) during liquid- and solid-phase reactions. Results of a new bi-layer UBM of Ni-Cu which is especially designed for small-sized lead-free solder bumps will be discussed. (c) 2006 Elsevier B.V. All rights reserved.
引用
收藏
页码:290 / 295
页数:6
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