Design of hybrid SET-CMOS D/A converter

被引:0
作者
Le, JY [1 ]
Jiang, JF [1 ]
Cai, QY [1 ]
机构
[1] Shanghai Jiao Tong Univ, Res Inst Micro Nano Sci & Technol, Shanghai 200030, Peoples R China
来源
2001 4TH INTERNATIONAL CONFERENCE ON ASIC PROCEEDINGS | 2001年
关键词
D O I
10.1109/ICASIC.2001.982558
中图分类号
TP [自动化技术、计算机技术];
学科分类号
0812 ;
摘要
In this article, a hybrid functional SET (Single Electron Transistor) -CMOS circuit: Capacitance Weighted Hybrid SET-CMOS Digital-to-Analog Converter (DAC) is carried out. The switch of the conventional capacitance weighted DAC is substituted by a SET inverter. The structure of the new DAC circuit is analyzed and the advantage is discussed. With our simulating program: SJTU-SE-SPICE, The new DAC circuit and its switch are simulated. The results indicate that such circuit has a good D/A converting function.
引用
收藏
页码:299 / 302
页数:4
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