Comparing the performance of a low-power high speed flip-flop in bulk and SOI technologies

被引:1
作者
Forouzandeh, B. [1 ]
Seyedi, A. S. [1 ]
机构
[1] Univ Tehran, Dept Elect & Comp Engn, Tehran, Iran
来源
PROCEEDINGS OF THE INTERNATIONAL CONFERENCE MIXED DESIGN OF INTEGRATED CIRCUITS AND SYSTEMS | 2006年
关键词
flip-flop; SOI; bulk; low power; low leakage; high speed;
D O I
10.1109/MIXDES.2006.1706578
中图分类号
TM [电工技术]; TN [电子技术、通信技术];
学科分类号
0808 ; 0809 ;
摘要
In this paper, the performance of Double-edge triggered Feedbacked Flip-Flop (DFFF) in SOI and Bulk technologies has been compared. DFFF power consumption is reduced by avoiding unnecessary internal node transition. The subthreshold current in this flip-flop is very low compared to the other structures. Reducing the number of transistors in the stack and increasing the number of charge path lead to less delay and thus higher operational speed compared to the other flip-flops. By using SOI technology, the power consumption and speed have been improved further compared to Bulk technology. The performance improvement is 37.10% to 45.54% for discussed flip-flops compared to Bulk technology.
引用
收藏
页码:251 / +
页数:3
相关论文
共 11 条
  • [1] HAMADA M, 1999, IEEE INT SOL STAT CI, P270
  • [2] KIM C, 2002, IEEE J SOLID STATE C, V37
  • [3] Klass F, 1998, S VLSI CIRC JUN, P108
  • [4] HALF-SWING CLOCKING SCHEME FOR 75-PERCENT POWER SAVING IN CLOCKING CIRCUITRY
    KOJIMA, H
    TANAKA, S
    SASAKI, K
    [J]. IEEE JOURNAL OF SOLID-STATE CIRCUITS, 1995, 30 (04) : 432 - 435
  • [5] KONG B, 2000, IEEE INT SOL STAT CI, P290
  • [6] Kuo J. B., 2001, LOW VOLTAGE SOI CMOS
  • [7] Hybrid Latch Flip-Flop with improved power efficiency
    Nedovic, N
    Oklobdzija, VG
    [J]. 13TH SYMPOSIUM ON INTEGRATED CIRCUITS AND SYSTEMS DESIGN, PROCEEDINGS, 2000, : 211 - 215
  • [8] NICOLICK B, 1999, IEEE INT SOL STAT CI, P282
  • [9] PARTOVI E, 1996, IEEE INT SOL STAT CI
  • [10] Double edge triggered feedback flip-flop in sub 100nm technology
    Rasouli, S. H.
    Amirabadi, A.
    Seyedi, A.
    Afkah-Kusha, A.
    [J]. ASP-DAC 2006: 11TH ASIA AND SOUTH PACIFIC DESIGN AUTOMATION CONFERENCE, PROCEEDINGS, 2006, : 297 - 302