Interface state degradation during AC positive bias temperature instability stress

被引:4
|
作者
Kang, Soo Cheol [1 ]
Kim, Seung Mo [1 ]
Jung, Ukjin [2 ]
Kim, Yonghun [3 ]
Park, Woojin [4 ]
Lee, Byoung Hun [1 ]
机构
[1] GIST, Sch Mat Sci & Engn, CEEDS, Gwangju 61005, South Korea
[2] SAMSUNG Semicond, Syst LSI Div, Giheung, South Korea
[3] Korea Inst Mat Sci, Surface Technol Div, Dept Adv Funct Thin Films, 797 Changwondaero, Gyeongnam, South Korea
[4] King Abdullah Univ Sci & Technol, Integrated Nanotechnol Lab, Elect Engn Program, Comp Elect Math Sci & Engn, Thuwal 239556900, Saudi Arabia
基金
新加坡国家研究基金会;
关键词
Bias temperature instability; Bipolar AC stress; Fin field-effect transistor; High-k/metal gate; Interface degradation; Recovery; FIELD-EFFECT TRANSISTORS; HFO2 GATE STACKS; ELECTRICAL CHARACTERISTICS; DIELECTRICS; DEPENDENCE; NMOSFETS; MOSFET; TRAPS; DC; RELAXATION;
D O I
10.1016/j.sse.2019.05.006
中图分类号
TM [电工技术]; TN [电子技术、通信技术];
学科分类号
0808 ; 0809 ;
摘要
The reliability of a bulk fin field-effect transistor (FinFET) with a high-k dielectric/metal-gate stack has been investigated by comparing the effects of DC and AC stresses. It is well known that the relaxation during the off-cycle of the AC stress decreases the V-th shift and enhances the device lifetime due to electron detrapping from the high-k dielectric. We found that the relaxation in the interface traps is significantly weaker than that of bulk traps during the unipolar and bipolar AC stresses. The weak recovery is attributed to the concurrent interface state generation during a positive-bias temperature instability (PBTI) stress. Eventually, the interface traps became a major source of the device drift (over 60%) at the high temperature of 400 K. This finding suggests that a new strategy is required to address the PBTI reliability focusing on the residual interface states as well as the bulk trapping, particularly at a high temperature.
引用
收藏
页码:46 / 50
页数:5
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