Optimal design for a high performance H-JLTFET using HfO2 as a gate dielectric for ultra low power applications

In this paper we have proposed an optimal design for a hetero- junctionless tunnel field effect transistor (TFET) using HfO2 as a gate dielectric. The device principle and performance are investigated using a 2D simulator. During this work, we investigated the transfer characteristics, output characteristics, transconductance, Gm, output conductance, GD, and C-V characteristics of our proposed device. Numerical simulations resulted in outstanding performance of the H-JLTFET resulting in I-ON of similar to 0.23 mA mu m(-1), I-OFF of similar to 2.2 x 10(-17) A mu m-(1,) I-ON/I-OFF of similar to 10(13), sub-threshold slope (SS) of similar to 12 mV dec(-1) , DIBL of similar to 93 mV V-1 and V-th of similar or equal to 0.11 V at room temperature and VDD of 0.7 V. This indicates that the H-JLTFET can play an important role in the further development of low power switching applications.