Sub-50 nm high performance PDBFET with impact ionization

被引：3

作者：

Born, M ^{[1
]}

Abelein, U ^{[1
]}

Bhuwalka, KK ^{[1
]}

Schindler, M ^{[1
]}

Schmidt, M ^{[1
]}

Ludsteck, A ^{[1
]}

Schulze, J ^{[1
]}

Eisele, I ^{[1
]}

机构：

[1] Univ Bundeswehr Munchen, Inst Phys, D-85577 Neubiberg, Germany

来源：

THIN SOLID FILMS | 2006年 / 508卷 / 1-2期

关键词：

Si-MBE; PDBFET; impact ionization; sub-threshold swing;

D O I：

10.1016/j.tsf.2005.07.329

中图分类号：

T [工业技术];

学科分类号：

08 ;

摘要：

Experimental results obtained with MBE-grown vertical planar-doped-barrier MOSFET (PDBFET) are presented. The device features all excellent I-ON/I-OFF ratio. At low drain-source voltages it behaves like a conventional short channel MOSFET with good short channel performance. A large drain bias activates gate controlled impact ionization which leads to a swing of less than 20 mV/dec. (c) 2005 Elsevier B.V. All rights reserved.

引用

页码：323 / 325

页数：3

共 8 条

[1] Band-to-band tunneling in carbon nanotube field-effect transistors
Appenzeller, J
Lin, YM
Knoch, J
Avouris, P
[J]. PHYSICAL REVIEW LETTERS, 2004, 93 (19) : 196805 - 1
[2] Performance enhancement of vertical tunnel field-effect transistor with SiGe in the δp+ layer
Bhuwalka, KK
Schulze, J
Eisele, T
[J]. JAPANESE JOURNAL OF APPLIED PHYSICS PART 1-REGULAR PAPERS SHORT NOTES & REVIEW PAPERS, 2004, 43 (7A): : 4073 - 4078
[3] 100-nm n/p-channel I-MOS using a novel self-aligned structure
Choi, WY
Song, JY
Lee, JD
Park, YJ
Park, BG
[J]. IEEE ELECTRON DEVICE LETTERS, 2005, 26 (04) : 261 - 263
[4] Impact ionization MOS (I-MOS) - Part I: Device and circuit simulations
Gopalakrishnan, K
Griffin, PB
Plummer, JD
[J]. IEEE TRANSACTIONS ON ELECTRON DEVICES, 2005, 52 (01) : 69 - 76
[5] Gopalakrishnan K, 2002, INTERNATIONAL ELECTRON DEVICES 2002 MEETING, TECHNICAL DIGEST, P289, DOI 10.1109/IEDM.2002.1175835
[6] Electric field tailoring in MBE-grown vertical sub-100 nm MOSFETs
Hansch, W
Rao, VR
Fink, C
Kaesen, F
Eisele, I
[J]. THIN SOLID FILMS, 1998, 321 : 206 - 214
[7] KITTLER K, 2000, P 2000 3 IEEE INT CA
[8] Hysteresis behavior in 85-nm channel length vertical n-MOSFET's grown by MBE
Rao, VR
Wittmann, F
Gossner, H
Eisele, I
[J]. IEEE TRANSACTIONS ON ELECTRON DEVICES, 1996, 43 (06) : 973 - 976

← 1 →