Implementation of FPGA based Space Vector PWM Method for Five Level Cascaded Inverter

被引：0

作者：

Sirisha, B. ^{[1
]}

Kumar, P. Satish ^{[1
]}

机构：

[1] Osmania Univ, Univ Coll Engn, Dept Elect Engn, Hyderabad 7, Andhra Pradesh, India

来源：

2016 IEEE 7TH POWER INDIA INTERNATIONAL CONFERENCE (PIICON) | 2016年

关键词：

Mufti Level Inverter (MLI); Space Vector Pulse Width Modulation (SVPWM); Field Programmable Gate Array (FPGA) Cascaded Inverter; MULTILEVEL INVERTERS; SIMULATION; CONVERTERS; ALGORITHM;

D O I：

暂无

中图分类号：

TM [电工技术]; TN [电子技术、通信技术];

学科分类号：

0808 ; 0809 ;

摘要：

This paper presents generation of switching pattern using simplified Space Vector Pulse Width Modulation technique and its implementation with FPGA. The proposed modulation method is effective regarding the reduction of computational difficulty and execution time, in calculation of on duration of switches. The switching scheme generates a voltage vector with reduced total harmonic distortion with low switching frequency. This technique is verified for five level Cascaded inverter experimentally and simulated with dynamic model of Induction Motor Load in MATLAB/ Simulink software before implementation. The simulation and experimental results shows that both are in close correspondence.

引用

页数：6

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