On-chip RF isolation techniques

被引：46
|
作者：
Blalack, T [1 ]
Leclercq, Y [1 ]
Yue, CP [1 ]
机构：
[1] Cadence Design Syst, San Jose, CA 95134 USA
来源：
PROCEEDINGS OF THE 2002 BIPOLAR/BICMOS CIRCUITS AND TECHNOLOGY MEETING | 2002年
关键词：
D O I：
10.1109/BIPOL.2002.1042919
中图分类号：
TM [电工技术]; TN [电子技术、通信技术];
学科分类号：
0808 ; 0809 ;
摘要：
On-chip isolation is a function of many interdependent variables. This paper uses industry examples to highlight isolation impacts of technology substrate doping levels and triple wells, grounding / guard rings, shielding, capacitive decoupling, and package inductance.
引用
收藏
页码：205 / 211
页数：7
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