A Hardware Architecture of Face Detection for Human-robot Interaction and its Implementation

被引：0

作者：

Lee, Sang-Seol ^{[1
]}

Jang, Sung-Joon ^{[1
]}

Kim, Jungho ^{[1
]}

Choi, Byeongho ^{[1
]}

机构：

[1] Korea Elect Technol Inst, Daewangpangyo Ro 712Beon Gil, Seongnam Si, Gyeonggi Do, South Korea

来源：

2016 IEEE INTERNATIONAL CONFERENCE ON CONSUMER ELECTRONICS-ASIA (ICCE-ASIA) | 2016年

关键词：

Face Detection; Humanoid Robot; Human-robot interaction; AdaBoost; FPGA;

D O I：

暂无

中图分类号：

TM [电工技术]; TN [电子技术、通信技术];

学科分类号：

0808 ; 0809 ;

摘要：

This paper presents hardware architecture with low-complexity face detection (FD) and parallel processing of local binary pattern (LBP) generation and adaptive boosting (AdaBoost) algorithm using Haar features for the intelligent service robot system. We designed a fully pipelined architecture implemented with the design techniques, such as variable image scaling and parallel processing multiple classifiers without integral image generation, on the FPGA platform. The proposed architecture enables a real-time FD processing for a VGA video at 30 frames per second.

引用

页数：2