A genetic algorithm for the optimisation of a reconfigurable pipelined FFT processor

被引：0
|
作者：
Sulaiman, N [1 ]
Arslan, T [1 ]
机构：
[1] Univ Edinburgh, Dept Elect & Elect Engn, Edinburgh EH8 9YL, Midlothian, Scotland
来源：
2004 NASA/DOD CONFERENCE ON EVOLVABLE HARDWARE, PROCEEDINGS | 2004年
关键词：
D O I：
暂无
中图分类号：
TP3 [计算技术、计算机技术];
学科分类号：
0812 ;
摘要：
This paper describes the optimisation of the word length in a 16-point radix-4 reconfigurable pipelined Fast Fourier Transform (FFT) based receiver device. Two forms of optimisation; input data optimisation and FFT coefficients optimisation are investigated in this paper. The word length for input data and FFT coefficients are initially set to 16-bits. A Genetic Algorithm (GA) is then used to find the optimal word length for the input data and FFT coefficients while satisfying functionality constraints. The GA is able to determine an optimised word length down to 10 bits for input data and 8 bits for the FFT coefficients.
引用
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页码：104 / 108
页数：5
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