Multistage interconnection Networks (MINs) an very popular in ATM switching since they can achieve high-performance switching and an easy to implement and expand dare to their modular design. In this paper we present and describe in detail a high-performance buffered-banyan switch which encompasses multiple input-queueing as its buffering strategy. We call this switching architecture Dual-Banyan switch. Simulation results are given to demonstrate ifs throughput, mean waiting time and cell-loss performance considering different switch and buffer sizes. We further compare it to the simple, single-queue buffered banyan network, assuming, for reasons of fairness, the some total buffer capacity and with respect to uniform and non-uniform traffic patterns.