Low cost architecture of direct conversion digital receiver

被引：5
|
作者：
Gagné, JF [1 ]
Gauthier, J [1 ]
Wu, K [1 ]
Bosisio, RG [1 ]
机构：
[1] Ecole Polytech, Ctr Rech Avancees Microondes & Elect Spatiale, Dept Genie Elect & Genie Informat, Montreal, PQ H3V 1A2, Canada
来源：
IEE PROCEEDINGS-MICROWAVES ANTENNAS AND PROPAGATION | 2004年 / 151卷 / 01期
关键词：
D O I：
10.1049/ip-map:20040049
中图分类号：
TM [电工技术]; TN [电子技术、通信技术];
学科分类号：
0808 ; 0809 ;
摘要：
The paper presents a low-cost architecture for a direct conversion digital receiver that uses six-port technology. An experimental prototype has been constructed and tested. Analogue carrier recovery and decision circuits are investigated as a means to provide future system integration and high data rate capacity. The designed receiver is operated at an ISM frequency of 2.45 GHz and uses a QPSK modulation format. Results on data rate limitations are given for QPSK signals up to 52Mb/s. Test results related to adjacent channel, co-channel and CW interferences are presented for a data rate of 40Mb/s. Phase offset between carrier and reference signals, along with carrier frequency deviation performances, are also presented for a rate of 40Mb/s. A frequency hopping spread spectrum technique is discussed on the basis of the proposed architecture.
引用
收藏
页码：71 / 76
页数：6
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