A Systematic Study on Explicit-State Non-Zenoness Checking for Timed Automata

被引:8
|
作者
Wang, Ting [1 ]
Sun, Jun [2 ]
Wang, Xinyu [1 ]
Liu, Yang [3 ]
Si, Yuanjie [1 ]
Dong, Jin Song [4 ]
Yang, Xiaohu [1 ]
Li, Xiaohong [5 ]
机构
[1] Zhejiang Univ, Coll Comp Sci, Hangzhou, Zhejiang, Peoples R China
[2] Singapore Univ Technol & Design, ISTD, Singapore, Singapore
[3] Nanyang Technol Univ, Sch Comp Engn, Singapore 639798, Singapore
[4] Natl Univ Singapore, Sch Comp, Singapore 117548, Singapore
[5] Tianjin Univ, Sch Comp Sci & Technol, Tianjin, Peoples R China
关键词
Timed automata; non-Zenoness; model checking; verification tool; MODEL-CHECKING; VERIFICATION; POWER; TOOL;
D O I
10.1109/TSE.2014.2359893
中图分类号
TP31 [计算机软件];
学科分类号
081202 ; 0835 ;
摘要
Zeno runs, where infinitely many actions occur within finite time, may arise in Timed Automata models. Zeno runs are not feasible in reality and must be pruned during system verification. Thus it is necessary to check whether a run is Zeno or not so as to avoid presenting Zeno runs as counterexamples during model checking. Existing approaches on non-Zenoness checking include either introducing an additional clock in the Timed Automata models or additional accepting states in the zone graphs. In addition, there are approaches proposed for alternative timed modeling languages, which could be generalized to Timed Automata. In this work, we investigate the problem of non-Zenoness checking in the context of model checking LTL properties, not only evaluating and comparing existing approaches but also proposing a new method. To have a systematic evaluation, we develop a software toolkit to support multiple non-Zenoness checking algorithms. The experimental results show the effectiveness of our newly proposed algorithm, and demonstrate the strengths and weaknesses of different approaches.
引用
收藏
页码:3 / 18
页数:16
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